nRF5x GPIOTE tutorial

Overview

In this lab we will study the GPIO tasks and events (GPIOTE) hardware and its driver in depth, we will also shed the light on the Programmable Peripheral Interconnect (PPI) subsystem inside an nRF5x SoC chip. A comprehensive example demonstrating the use of GPIOTE to automate interactions between system blocks and the GPIO without the involvement of the CPU will be provided at the end of the lab session.

The GPIOTE is used with the PPI to automate tasks.  It provides functionality for accessing GPIO pins using tasks and events registers.

Which brings us to tasks and events; almost all system blocks (including Peripheral blocks) inside an nRF5x chip are connected to the PPI bus and has tasks and events registers. The PPI along with the tasks and events of the system blocks allow system blocks to interact with each other without involving the CPU. The CPU is a major user of the device power, so this in general saves power and has other advantages:

  • CPU can be in sleep mode, whilst peripherals are performing tasks together.
  • CPU can be doing other tasks, whilst peripherals are performing tasks together.
PPI Bus inside an nRF52

The PPI Bus inside an nRF5x chip(Facilities autonomous communication between system Blocks)

 

nrf52840 GPIOTE tutorial PPI BUS

The CPU could be in sleep mode or doing other tasks while systems blocks are using the PPI Bus autonomously.

nrf52840 gpiote tutorial

The events and tasks registers inside most system blocks (Including peripherals ) work hands in hands with the PPI to provide autonomous communication.

A task triggers an action in a peripheral. You may consider it as an input to the peripheral, while on the other hand an event is an output from the peripheral.

nrf52840 gpiote tutorial

Generic view of an nRF5x peripheral ( Tasks are inputs , Events are output)

If a connection is established between an event output of a specific peripheral (Let’s call it X) and a task input of another peripheral (Let’s call it Y). The two can communicate without the need of the CPU involvement (See figures below). This setup is very handy in many situations, as we will see in advanced labs.

nrf52840 gpiote tutorial

The use of Tasks and Events registers with the PPI bus.

nrf52840 gpiote tutorial

An example showing the usage of the GPIOTE to allow peripherals to interact with the GPIO pins without the involvement of the CPU. This is what we will implement in this lab at example demo section.

GPIOTE module. Attempting to write a pin as a normal GPIO pin will have no effect.

A GPIO can be driven through the GPIOTE to change state on system events using the PPI system.
A GPIOTE also enables GPIOs to generate events on pin state change which can be used to carry out tasks through the PPI system. Low power detection of pin state changes is possible when in System ON or System OFF.

There are 8 GPIOTE in the nRF52840 SoC.  Up to three tasks can be used in each GPIOTE channel for performing write operations to a pin. Two tasks are fixed (SET and CLR), and one (OUT) is configurable to perform following operations:

  • Set
  • Clear
  • Toggle

An event can be generated in each GPIOTE channel from one of the following input conditions:

  • Rising edge
  • Falling edge
  • Any change

Using the GPIOTE

For the complete materials (available in both online form and .pdf) along with the source code of the demo examples, contact us on consult@embeddedcentric.com .